Tianrui Wei

@tianrui-wei

tempus fugit

@ucb-bar Berkeley, California

Followers

396

Following

Public Repos

Private Repos

Language Breakdown

Lines of code distribution across 4 owned repositories

538.7M Total LOC

Assembly

448,702,177 lines

83.3%

N/A

75,767,080 lines

14.1%

N/A

Verilog

7,626,708 lines

1.4%

N/A

Python

2,303,349 lines

0.4%

N/A

Batchfile

1,168,914 lines

0.2%

N/A

Other

3,148,419 lines

0.6%

N/A

I-Shaped Developer

I-shaped

Specialist — deep expertise in Assembly

Assembly

Verilog

Python

Batchfile

Collaboration Network

Global Impact visualization

LIVE

0 active collaborators

Repos

282

PRs

Growth

+18%

Top Collaborators

No collaborator data yet.

Coding Streak

Contribution activity over the past year

1 day

1,444

Contributions

Commits

Pull Requests

Jun Jul Aug Sep Oct Nov Dec Jan Feb Mar Apr May Jun

Based on GitHub activity

Less

Followers 92

Andrew Waterman

@aswaterman

Shreekanth Guttedar

@shreekanthashokg-lang

mugi0v0

@koross49

Qijia Yang

@MrAMS

Di Wang

@cedard234

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Following

396 total

Luc Maranget

@maranget

Rishiyur S. Nikhil

@rsnikhil

Polygon

@MuiseDestiny

Yuan Fu

@casouri

David Lattimore

@davidlattimore

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Synced via GitHub

Top Repositories

wave_searcher

Implementation of post-process coverage, and batch waveform search

1 0

Python

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

1 0

C++

piton-linux

Linux Kernel for OpenPiton

1 0

uboot-openpiton

uboot port for OpenPiton

1 0

openpiton

The OpenPiton Platform

1 0

Assembly

circt

Circuit IR Compilers and Tools

0 0

C++

riscv-isa-manual

RISC-V Instruction Set Manual

0 0

TeX

homebrew-core

🍻 Default formulae for the missing package manager for macOS (or Linux)

0 0

Ruby

riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

0 0

Scala

bitwise

Terminal based bit manipulator in ncurses

0 0

Open Source Impact

Contributions to external projects

59 merged PRs

riscv-boom/riscv-boom

Contributed to 3 repositories